Associate I | 0-2 yrs | UST
UST Recruitment | Associate I | 0-2 year | Bangalore
At UST, we’re seeking an Associate I – VLSI to join our innovative team. This role offers the opportunity to work on cutting-edge projects and collaborate with top industry professionals. If you have passion for VLSI design and a drive for excellence, apply now to be part of our dynamic and forward organization.
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Associate I – VLSI (0-2 years)
UST (formerly known as UST GLOBAL) is hiring for the post of Associate I – VLSI. Interested and eligible candidates can read more details below.
Company Name : UST
Job Location : Bangalore, KA, India
Job Title : Software Test Engineer
Education : Bachelors Degree
Experience : 0-2 years
UST Recruitment 2024
♦ Programming skills – C, experience in using scripting languages like perl, python
♦ Understanding of digital logic design, IP/ SOC architecture
♦ Grasp of ARM and system memory architecture Fundamentals
♦ Experience with emulation platform (Zebu, Palladium)
♦ Waveform debugging with verdi, sim-vision tools and ability to read/ debug RTL code
♦ Experience with trace-32 debugger and CMM scripting
♦ Understanding on ARM coresight architecture
♦ Ability to compile the design in emulators
Role Description :
Role Proficiency:
Works under supervision and guidance to execute internal tasks in any field of VLSI Frontend Backend or Analog design
Outcomes :
♦ Works as an individual contributor and on any one task of RTL Design/Module Verification/ PD/ DFT/ Circuit Design/ Analog Layout/ STA/ Synthesis/ Design Checks/ Signoff etc.
♦ Complete the assigned task in the defined domain(s) successfully and on-time with support from other team members and senior engineers
♦ Ensure quality delivery as approved by the senior engineer
Measures of Outcomes :
♦ Quality – verified using relevant metrics by Lead
♦ Timely delivery – verified using relevant metrics by Lead
♦ Reduction in cycle time and cost using innovative approaches
♦ Number of trainings attended
Technical Skills :
♦ Build up required technical skills and design knowledge to execute the assigned tasks
Quality of the deliverables :
♦ Clean delivery of the module in-terms of ease in integration at the top level
♦ Meeting functional spec / design guidelines at least 80% of the time without deviation or limitation
♦ Documentation of tasks and work performed
Timely delivery :
♦ Meeting project timelines as set forth by the team lead
♦ Help with intermediate tasks delivery with other team members to aid progress
Teamwork :
♦ Participation in teamwork at the time of need
♦ Able to take on additional tasks incase of any team member(s) is not available
Innovation & Creativity :
♦ Understand how to approach repetitive work by automating tasks saving design cycle time
♦ Participation in technical discussion/ training/ forum
Skill Examples :
♦ Languages and Programming skills: System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/ TK Makefile Spice (any one)
♦ EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more) b. Simulators Lint CDC/ RDC DC/ RTL-C ICC/ Innovus/ Olympus ETS/ TK/ FS PT/ Tempus Calibre etc. (any one)
♦ Technical Knowledge: (any one) a. Learn to understand IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verification b. Theoretical knowledge in Bus Protocol AHB/ AXI/ PCIe/ USB/ Ethernet/ SPI/ I2C Microprocessor architecture c. Fair knowledge of Physical Design / Circuit Design / Analog Layout d. Fair understanding of Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verification
♦ Technology: CMOS FinFet FDSOI – 28nm / 22nm / 16ff / 10nm and below
♦ Able to deliver the tasks with quality at least 80 % on-time per quality guidelines and GANTT
♦ Good communication skills
♦ Good analytical reasoning and problem-solving skills and attention to details
♦ Ability to learn new skills in case required technical skills are not present at a level needed to execute the project
♦ Basic understanding in any of the design by executing any one of – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc.
♦ Understanding of the design flow and methodologies used in the designing
♦ Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the manager per skill set
‹‹‹ more details ›››
How to Apply :
All interested and eligible candidates can apply in online mode for Associate I – VLSI position.
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Intern Jobs Recruitment 2024
Salary : The salary for this role is upto ₹ 6.0 LPA *
About UST
UST, formerly known as UST Global, is a multinational digital technology company providing IT services and solutions. With a focus on digital transformation and innovation, UST services such as consulting, cybersecurity, and data analytics to clients worldwide. Headquartered in California, UST has a global presence with offices in countries like India, the UK, Malaysia, and the Philippines.
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